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[parent] [thread] 3 comments
1. klelat+(OP)[view] [source] 2022-01-20 15:04:15
Are you saying Arm haven't released a CHERI enabled Morello board?
replies(1): >>netr0u+51
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2. netr0u+51[view] [source] 2022-01-20 15:09:06
>>klelat+(OP)
It's technically true, but it makes it look like CHERI is only for ARM.
replies(2): >>jrtc27+1a >>dev_tt+hV
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3. jrtc27+1a[view] [source] [discussion] 2022-01-20 15:49:10
>>netr0u+51
I don't see why it implies that. "Arm releases experimental DDR5-enabled $NAME board" wouldn't make it sound like DDR5 is only for Arm, so why would "Arm releases experimental CHERI-enabled Morello board"?
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4. dev_tt+hV[view] [source] [discussion] 2022-01-20 19:14:28
>>netr0u+51
The HN title is an accurate reflection of the article and the event. When the RISC-V group has a similar event, there will be a similar article. Nothing deceptive or incorrect here.
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