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1. sylwar+(OP)[view] [source] 2023-01-23 14:03:47
Not really related to golang but: AVX512 is THE sweet spot to go for that for vector instructions as 512bits=64bytes=x86_64 cache line size.
replies(1): >>zamada+9n
2. zamada+9n[view] [source] 2023-01-23 15:50:41
>>sylwar+(OP)
Dumb question but do you have to do anything manually to ensure it’s actually aligned to a single cache line or does it just happen because of the way things work?
replies(1): >>stagge+Rr
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3. stagge+Rr[view] [source] [discussion] 2023-01-23 16:06:38
>>zamada+9n
Not a dumb question. In theory, yes you want it to be aligned for performance reasons, and you can do this with one of the _aligned_malloc()/aligned_alloc() variants. In reality though, for any non-trivial algorithm, you may not be able to always enforce this.
replies(1): >>sylwar+Wu
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4. sylwar+Wu[view] [source] [discussion] 2023-01-23 16:17:42
>>stagge+Rr
Usually you alloc some slack memory to be able to re-align on a cache line. But yeah, it seems better if the allocator can cleanely deal with that.
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