zlacker

>>signa1+(OP)
Not really related to golang but: AVX512 is THE sweet spot to go for that for vector instructions as 512bits=64bytes=x86_64 cache line size.

>>sylwar+b76
Dumb question but do you have to do anything manually to ensure it’s actually aligned to a single cache line or does it just happen because of the way things work?

>>zamada+ku6
Not a dumb question. In theory, yes you want it to be aligned for performance reasons, and you can do this with one of the _aligned_malloc()/aligned_alloc() variants. In reality though, for any non-trivial algorithm, you may not be able to always enforce this.