zlacker

[parent] [thread] 3 comments
1. raw_an+(OP)[view] [source] 2026-02-04 18:52:57
That’s not realistic with any processor that does branch prediction, cache hits vs cache misses etc
replies(1): >>skydha+en
2. skydha+en[view] [source] 2026-02-04 20:42:04
>>raw_an+(OP)
You can easily compute the worst cases. All the details are in the specs of the processor.
replies(1): >>raw_an+6v
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3. raw_an+6v[view] [source] [discussion] 2026-02-04 21:16:35
>>skydha+en
Assuming also that you are not running on top of an operating system, running in a VM with “noisy neighbors”…

I haven’t counted cycles since programming assembly on a 65C02 where you cooks save a clock cycle by accessing memory in the first page of memory - two opcodes to do LDA $02 instead of LDA $0201

replies(1): >>skydha+AF
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4. skydha+AF[view] [source] [discussion] 2026-02-04 22:10:16
>>raw_an+6v
Then assumes the opposite. Build an RTOS and don’t virtualize your software on top of it.
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