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1. mhh__+(OP)[view] [source] 2023-10-14 19:09:42
SIMT let's a scheduler get clever about memory accesses, SIMD can practically only access memory linearly (scatter gather can do better but it's still usually quite linear) whereas SIMT can be much smarter in terms of having lots of similar bits of work going on in ways that use the bandwidth maximally and don't overlap.
replies(1): >>kllrno+E
2. kllrno+E[view] [source] 2023-10-14 19:14:25
>>mhh__+(OP)
https://developer.nvidia.com/blog/how-access-global-memory-e...

SIMT still expects coalesced memory access that's close together otherwise performance falls off a cliff

replies(1): >>the_sv+yL1
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3. the_sv+yL1[view] [source] [discussion] 2023-10-15 14:32:49
>>kllrno+E
Yes, but not all thread in the block need to. As long as you fill a cache line you’re good.
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