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1. sigjui+(OP)[view] [source] 2017-07-11 23:08:19
How does contributing to RISC-V help? Makers of RISC-V SoCs are free to add their own Intel ME equivalents.
replies(1): >>gcb0+FS2
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2. gcb0+FS2[view] [source] 2017-07-13 09:27:57
>>sigjui+(OP)
and it will probably be done before PCIe :(
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