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1. fulafe+(OP)[view] [source] 2025-12-03 19:33:53
The instruction set has marginal impact. But many power efficient chips happen to be using the ARM instruction set today.
replies(1): >>IshKeb+Ly
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2. IshKeb+Ly[view] [source] 2025-12-03 22:21:38
>>fulafe+(OP)
I think that's still highly debatable. Intel and AMD claim the instruction set makes no difference... but of course they would. And if that's really the case where are the power efficient x86 chips?

Possibly the truth is that everyone is talking past each other. Certainly in the Moore's Law days "marginal impact" would have meant maybe less then 20%, because differences smaller than that pretty much didn't matter. And there's no way the ISA makes 20% difference.

But today I'd say "marginal impact" is less than 5% which is way more debatable.

replies(1): >>bigyab+MA
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3. bigyab+MA[view] [source] [discussion] 2025-12-03 22:33:14
>>IshKeb+Ly
> And if that's really the case where are the power efficient x86 chips?

Where are the power inefficient x86 chips? If you normalize for production process and put the chips under synthetic load, ARM and x86 usually end up in a similar ballpark of efficiency. ARM is typically less efficient for wide SIMD/vector workloads, but more efficient at idle.

AMD and Intel aren't smartphone manufacturers. Their cash cows aren't in manufacturing mobile chipsets, and neither of them have sweetheart deals on ARM IP with Softbank like Apple does. For the markets they address, it's not unlikely that ARM would be both unprofitable and more power-hungry.

replies(2): >>mhast+9F >>lmm+wR
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4. mhast+9F[view] [source] [discussion] 2025-12-03 22:57:15
>>bigyab+MA
Jim Keller goes into some detail about what difference the ISA makes in general in this clip https://youtu.be/yTMRGERZrQE?si=u-dEXwxp0MWPQumy

Spoiler, it's not much because most of the actual execution time is spent in a handful of basic OPs.

Branch prediction is where the magic happens today.

replies(2): >>snvzz+S61 >>IshKeb+oS1
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5. lmm+wR[view] [source] [discussion] 2025-12-04 00:24:28
>>bigyab+MA
Intel spent years trying to get manufacturers to use their x86 chips in phones, but manufacturers turned them down, because the power efficiency was never good enough.
replies(2): >>bigyab+WT >>fulafe+pB1
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6. bigyab+WT[view] [source] [discussion] 2025-12-04 00:42:21
>>lmm+wR
You're basically reiterating exactly what I just said. Intel had no interest in licensing ARM's IP, they'd have made more money selling their fab space for Cortex designs at that point.

Yes, it cost Intel their smartphone contracts, but those weren't high-margin sales in the first place. Conversely, ARM's capricious licensing meant that we wouldn't see truly high-performance ARM cores until M1 and Neoverse hit the market.

replies(1): >>lmm+pZ
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7. lmm+pZ[view] [source] [discussion] 2025-12-04 01:31:58
>>bigyab+WT
> Intel had no interest in licensing ARM's IP, they'd have made more money selling their fab space for Cortex designs at that point.

Maybe, but the fact remains that they spent years trying to make an Atom that could fit the performance/watt that smartphone makers needed to be competitive, and they couldn't do it, which pretty strongly suggests it's fundamentally difficult. Even if they now try to sour-grapes that they just weren't really trying, I don't believe them.

replies(1): >>bigyab+rn1
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8. snvzz+S61[view] [source] [discussion] 2025-12-04 02:40:51
>>mhast+9F
>Spoiler, it's not much because most of the actual execution time is spent in a handful of basic OPs.

Yet, on a CISC ISA, you still have to support everything else, which is essentially cruft.

replies(1): >>devnul+dR2
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9. bigyab+rn1[view] [source] [discussion] 2025-12-04 05:48:14
>>lmm+pZ
I think we're talking past each other here. I already mentioned this in my original comment:

  ARM is typically [...] more efficient at idle.
From Intel's perspective, the decision to invest in x86 was purely fiscal. With the benefit of hindsight, it's also pretty obvious that licensing ARM would not have saved the company. Intel was still hamstrung by DUV fabs. It made no sense to abandon their high-margin datacenter market to chase low-margin SOCs.
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10. fulafe+pB1[view] [source] [discussion] 2025-12-04 08:18:53
>>lmm+wR
Well, they were targeting Android, and the apps were emulating ARM on x86, and they were going against a strong incumbent. Accounts on the web of this failure seem to bring up other failings as the main problems.
replies(2): >>fulafe+xC1 >>IshKeb+bS1
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11. fulafe+xC1[view] [source] [discussion] 2025-12-04 08:29:41
>>fulafe+pB1
Eg this review of the AZ210 phone from 2012 seems to think the battery life was good: https://www.trustedreviews.com/reviews/orange-san-diego

"Battery life during our test period seemed to be pretty good and perhaps slightly better than many dual-core Android phone’s we’ve tested."

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12. IshKeb+bS1[view] [source] [discussion] 2025-12-04 10:48:19
>>fulafe+pB1
> the apps were emulating ARM on x86

They weren't (except some games maybe). Most apps were written in Java and JITed.

replies(1): >>fulafe+lC2
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13. IshKeb+oS1[view] [source] [discussion] 2025-12-04 10:50:04
>>mhast+9F
Jim Keller has to say that.
replies(1): >>bigyab+bH4
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14. fulafe+lC2[view] [source] [discussion] 2025-12-04 15:54:07
>>IshKeb+bS1
Well, apps tuned for performance and apps using native code have more than a little overlap. Even back then there were a lot of apps besides games that used native code for the hot code paths. But games of course are huge by themselves, and besides performance you need to have good power efficiency in running them.

Here's some more details: https://www.theregister.com/2014/05/02/arm_test_results_atta...

(note it's a 2-part, the "next page" link is small print )

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15. devnul+dR2[view] [source] [discussion] 2025-12-04 17:04:22
>>snvzz+S61
Does that matter? I lean towards the yes-the-ISA-matters camp, but I'm also under the impression that most silicon is dark.
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16. bigyab+bH4[view] [source] [discussion] 2025-12-05 04:53:50
>>IshKeb+oS1
The stage is yours if you choose to refute him.
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