zlacker

>>tin7in+(OP)
If the bottleneck isn’t TSMC wafer starts but CoWoS, where exactly does that bottleneck come from? From what I understand, its the interposer connecting GPU and HBM wafers. Are they hard to make, is the yield bad, are there insufficient production lines, …?

>>MrBudd+Gh
Nah cause AMD could be being used if they had software. Also Intel is totally different fabs and wafers, but both are not close in software to Nvidia